This invention relates to a circuit for providing a symmetrical variable impedance and more particularly to such a circuit used for gain control and employing field effect transistors.
It is known to use metal oxide semiconductor field effect transistors (MOSFETs) as variable impedance elements in gain control circuits. Thus the prior art teaches the use of MOSFET devices as voltage controlled attenuators or voltage controlled resistors for gain control and for other applications as well.
When an MOSFET is used in the ohmic region below the pinch off voltage (V.sub.p), the MOSFET functions as a voltage controlled resistor or a voltage variable resistor (VVR). The MOSFET can therefore be used as an attenuator and anywhere a small signal voltage controlled resistor is needed. However, in spite of the widespread uses, care has to be taken in employing the device as a variable resistor due to the non linearities of the transfer characteristics of such a device.
Essentially, the problem will be explained by referring to FIG. 1 which is indicative of a prior art gain control circuit employing MOS transistors. Generally, most prior art implementations utilizing a single MOS or a compound MOS device either suffer from non-linearity, as indicated above, or require substantial class A current for operation. In regard to class A current operation, such a MOS device must be biased in a linear region to assure that current swings occur symmetrically on both sides of the biasing point in order to achieve linear and symmetrical operation within a small range about the quiescent operating point. This essentially specifies class A operation which is well understood in regard to transistors and vacuum tube amplifiers as well.
Referring to FIG. 1, there is shown a prior art type of gain control which has been widely employed. There is a signal source 10 which is a source of an AC signal. The signal source 10 may be an oscillator, amplifier, a communications channel or any other signal source which provides an AC output signal. The output of the signal source 10 is connected to one end of a resistor 11 whose other end is connected to a shunt path comprising a variable resistor device designated generally by reference numeral 12. The variable resistor device 12 has output terminals A and C which are connected between shunt terminal T and a point of reference potential and a control input terminal designated as B.
As shown in FIG. 1, the output signal from the signal source 10 as applied via resistor 11 is applied to the input of a peak detecting circuit 13. There is shown an amplifier Al having an input coupled to terminal T and an output coupled to the input of the peak detector 13. This amplifier A1 may be omitted in applications where gain is not required, as the source 10 may itself be an amplifier or a gain providing circuit. The peak detecting circuit 13 may be a conventional peak detector and has also applied thereto a reference voltage. The reference voltage enables the peak detector 13 to operate to provide an output to control the impedance of the variable impedance device 12 when the output signal from the amplifier A1 exceeds the predetermined reference value. In this manner the peak amplitude of the signal at the output port (OUT) of the device will be constant as the peak detector, in conjunction with the reference voltage, will control the variable resistance device 12 in a direction to maintain a constant output. FIG. 1 shows two types of variable resistance devices which can be employed in the circuit. Both types utilize MOS transistors. The first type, designated by reference numeral 15, is a single MOS transistor having a drain or source electrode A, a source or drain electrode C and a gate input electrode B. In the case of the N type the more positive electrode is the drain and in the case of the P type the more positive electrode is the source.
In utilizing the MOSFET 15 in place of the circuit module 12, one experiences problems in gain control. The main problem is that the MOS device 15 exhibits non-linear operation due to the non-linear transfer characteristics of a single N- or P-MOS transistor device. These non-linear transfer characteristics are well known and hence variation of the shunt impedance 12 in the circuit depicted will not be a linear function of the control voltage as applied to the gate electrode B. The effective shunt impedance of element 15 varies such that the signal produced at terminal T is not a linear function of the signal source 10. Thus, the output signal is not linearly related to the change or variation in the input source signal.
The problem can be circumvented by a composite device 16 shown in FIG. 1. The composite device includes a first MOS transistor 17 which is connected in series with a second MOS device 18 which device 18 is arranged in a diode configuration. As seen in FIG. 1, the appropriate terminals as A, B and C are indicated for both device 15 and 16 so one will understand how the devices are placed in the circuit shown in FIG. 1.
The device 16 provides more linear operation than the single MOS device 15, as an increasing voltage across either of the two transistors is matched by a decrease across the other so the nonlinearities in the transfer characteristics of the transistors as 17 and 18 tend to cancel. However, the device 16 does require a constant quiescent (Class A) current through both transistors. If excessive currents are drawn through devices 17 and 18, nonlinear operation occurs. It is noted that either N- or P-MOS transistors could be used for modules 15 and 16 provided the appropriate supply voltage is applied to these devices.
Thus, such prior art approaches for providing shunt gain control involve non-linear operation when employing single N- or P-channel MOS devices. When employing composite devices, as for example device 16, one requires operation in a Class A region which requires substantial power dissipation.
Therefore, in circuits embodying the invention there is provided a symmetrical variable impedance which can be employed in a gain control circuit to provide linear operation and which further avoids the necessity of requiring Class A current operation.
Circuits embodying the invention employ complementary field effect transistors having the conduction paths connected in parallel, which combination provides a symmetrical variable impedance when suitably controlled.